The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2017

Filed:

Mar. 09, 2016
Applicant:

Analog Devices, Inc., Norwood, MA (US);

Inventor:

Matthew Louis Courcy, Fremont, NH (US);

Assignee:

ANALOG DEVICES, INC., Norwood, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/08 (2006.01); H03M 1/66 (2006.01); H03L 7/089 (2006.01); H04L 7/033 (2006.01); H03M 1/06 (2006.01); H03M 1/10 (2006.01);
U.S. Cl.
CPC ...
H03M 1/0836 (2013.01); H03L 7/0891 (2013.01); H03M 1/0607 (2013.01); H03M 1/1009 (2013.01); H03M 1/66 (2013.01); H04L 7/033 (2013.01);
Abstract

Disclosed systems include a clock-multiplying phase locked loop (PLL) generating a clock signal for a DAC comprising a plurality of DAC cells, the systems configured to control that a phase of the DAC output has a predefined relation to a phase of a PLL input reference clock. An exemplary system incorporates an auxiliary DAC cell implemented as a replica of one of the DAC cells of the DAC and operation of the DAC and the auxiliary DAC cell is timed with the same clock signal generated by the PLL, so that outputs of the auxiliary cell and the DAC are phase synchronized by design. The system is configured to ensure that a phase of the auxiliary DAC cell output is related to the phase of the PLL reference clock, which results in a phase of the DAC output also being related to the phase of the PLL reference clock.


Find Patent Forward Citations

Loading…