The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2017

Filed:

Dec. 20, 2013
Applicant:

Qualcomm Technologies International, Ltd., Cambridge, GB;

Inventor:

Paul Simon Hoayun, Willingham, GB;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01); H01L 23/495 (2006.01); H01L 25/065 (2006.01); H03K 19/0175 (2006.01);
U.S. Cl.
CPC ...
H03K 19/17744 (2013.01); H01L 23/49524 (2013.01); H01L 23/49541 (2013.01); H01L 23/49548 (2013.01); H01L 25/0657 (2013.01); H03K 19/017581 (2013.01); H01L 23/49531 (2013.01); H01L 23/49575 (2013.01); H01L 2224/48091 (2013.01);
Abstract

A semiconductor die having: a logic unit having a plurality of inputs/outputs; a plurality of pads whereby electrical connections can be made to the die; and a multiplexer arranged between the inputs/outputs and the pads, the multiplexer being operable in a first mode in which it maps a first number of the inputs/outputs to a first number of the pads with a first mean spacing between those pads, and a second mode in which it maps a second number of the inputs/outputs to a first number of the pads with a second mean spacing between those pads, wherein the first number is larger than the second number and the first spacing is smaller than the second spacing.


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