The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2017

Filed:

Sep. 21, 2015
Applicant:

E Ink Holdings Inc., Hsinchu, TW;

Inventors:

Wei-Chou Lan, Hsinchu, TW;

Ted-Hong Shinn, Hsinchu, TW;

Henry Wang, Hsinchu, TW;

Chia-Chun Yeh, Hsinchu, TW;

Assignee:

E Ink Holdings Inc., Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 21/02 (2006.01); H01L 21/4763 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/24 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7869 (2013.01); H01L 21/02554 (2013.01); H01L 21/02565 (2013.01); H01L 21/47635 (2013.01); H01L 27/1218 (2013.01); H01L 27/1225 (2013.01); H01L 27/1288 (2013.01); H01L 29/24 (2013.01); H01L 29/4908 (2013.01); H01L 29/51 (2013.01); H01L 29/66969 (2013.01); H01L 29/78603 (2013.01); H01L 29/78606 (2013.01); H01L 27/127 (2013.01);
Abstract

Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.


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