The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2017

Filed:

Sep. 09, 2015
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, JP;

Inventors:

Tomoya Inden, Yokkaichi, JP;

Kimitoshi Okano, Yokkaichi, JP;

Kiyoshi Okuyama, Yokkaichi, JP;

Assignee:

KABUSHIKI KAISHA TOSHIBA, Minato-ku, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/10 (2006.01); H01L 27/02 (2006.01); H01L 27/115 (2006.01); H01L 23/535 (2006.01); H01L 23/528 (2006.01); G11C 16/12 (2006.01); G11C 16/06 (2006.01);
U.S. Cl.
CPC ...
G11C 16/10 (2013.01); G11C 16/12 (2013.01); H01L 23/528 (2013.01); H01L 23/535 (2013.01); H01L 27/0222 (2013.01); H01L 27/11521 (2013.01); H01L 27/11526 (2013.01); H01L 27/11568 (2013.01); H01L 27/11573 (2013.01); G11C 16/06 (2013.01);
Abstract

A semiconductor device according to an embodiment comprises: a field effect transistor comprising a semiconductor layer and a gate electrode; a wiring line layer positioned above the field effect transistor; and a control circuit that adjusts a voltage of a wiring line in the wiring line layer. The wiring line layer comprises: a contact wiring line connected to a source or a drain of the field effect transistor; and a first wiring line facing a position between the gate electrode and the contact wiring line, of the semiconductor layer. The control circuit adjusts the contact wiring line to a certain voltage and sets the first wiring line to a floating state.


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