The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2017

Filed:

Aug. 22, 2013
Applicants:

Zte Corporation, Shenzhen, Guangdong, CN;

Zte Microelectronics Technology Co., Ltd, Shenzhen, CN;

Inventor:

Linsheng Zhang, Shenzhen, CN;

Assignees:

ZTE MICROELECTRONICS TECHNOLOGY CO., LTD., Shenzhen, Guangdong, CN;

ZTE CORPORATION, Shenzhen, Guangdong, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 13/16 (2006.01); G11C 8/06 (2006.01); G06F 12/02 (2006.01); G06F 12/08 (2016.01); G06F 9/46 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1673 (2013.01); G06F 9/468 (2013.01); G06F 9/50 (2013.01); G06F 12/023 (2013.01); G06F 12/08 (2013.01); G11C 8/06 (2013.01); G06F 2212/1044 (2013.01);
Abstract

Provided are a method and device for buffer processing in a System on Chip (SoC). The method includes that when a first datum of a first user needs to be buffered, a current storage start address is read, the first datum is stored into a buffer space from the current storage start address, wherein the buffer space occupied by the first datum is a first buffer space; corresponding to the first datum, storage location information including a start address and a space length of the first buffer space is saved, so that when the first datum needs to be read, the first buffer space is located according to the start address and the space length, and the first datum is read from the first buffer space; the current storage start address is updated with a next address of the first buffer space, so that next data needing to be buffered is buffered from the updated current storage start address.


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