The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 07, 2017
Filed:
Jan. 19, 2015
Applicant:
Mediatek Inc., Hsin-Chu, TW;
Inventors:
Kuan-Hung Chen, Hsinchu County, TW;
Keng-Jan Hsiao, Taoyuan County, TW;
Hui-Chun Liu, Chiayi County, TW;
Assignee:
MEDIATEK INC., Hsin-Chu, TW;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/26 (2006.01); G05F 1/56 (2006.01); G06F 1/32 (2006.01); G05F 1/46 (2006.01); H02M 3/156 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
G06F 1/26 (2013.01); G05F 1/46 (2013.01); G05F 1/56 (2013.01); G06F 1/32 (2013.01); H02M 3/156 (2013.01); H02M 2001/0045 (2013.01);
Abstract
A pulse width modulation (PWM) based Real-time clock (RTC) system includes a voltage regulator circuit, a capacitor, an RTC circuit and an on-off logic. The voltage regulator circuit is arranged to generate a regulated voltage to a connection node when enabled; the capacitor is coupled to the connection node; the RTC circuit is coupled to the connection node; and the on-off logic is coupled to the voltage regulator circuit and arranged to alternately enable and disable the voltage regulator circuit.