The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2017

Filed:

Mar. 10, 2014
Applicants:

Hefei Boe Optoelectronics Technology Co., Ltd., Anhui, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventor:

Juncai Ma, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 9/00 (2006.01); H05K 1/11 (2006.01); H05K 7/00 (2006.01); H05K 7/10 (2006.01); G02F 1/1345 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H05K 1/111 (2013.01); G02F 1/13458 (2013.01); G02F 1/13452 (2013.01); G02F 1/13454 (2013.01); H05K 1/181 (2013.01); H05K 2201/094 (2013.01); H05K 2201/09436 (2013.01); H05K 2201/09709 (2013.01); H05K 2201/09736 (2013.01); H05K 2201/09845 (2013.01); H05K 2201/10234 (2013.01); Y02P 70/611 (2015.11);
Abstract

The present invention relates to an array substrate assembly and a display device. The array substrate assembly comprises a substrate; a first metal line formed at one side of the substrate; an insulating layer formed on the first metal line; a second metal line formed on the insulating layer, wherein one end of the second metal line connected with a driving circuit is formed with a second terminal, wherein in a thickness direction of the substrate, a distance between a surface of the second terminal away from the one side of the substrate and the substrate is less than a distance between a surface of the second metal line away from the one side of the substrate and the substrate. The display device includes the array substrate assembly. With the solution of the present invention, when the array substrate assembly is connected to IC or COF, deformation difference between a conducting gold ball at a gate line terminal and a conducting gold ball at a date line is small, thus impedances at the two terminals are close to each other, and therefore image quality of the display device is improved.


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