The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 31, 2017
Filed:
Oct. 08, 2015
Applicant:
Fuji Electric Co., Ltd., Kanagawa, JP;
Inventors:
Tatsuya Naito, Matsumoto, JP;
Masahito Otsuki, Matsumoto, JP;
Assignee:
FUJI ELECTRIC CO., LTD., Kanagawa, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 29/739 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 29/32 (2006.01); H01L 27/07 (2006.01); H01L 29/36 (2006.01); H01L 29/861 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1095 (2013.01); H01L 27/0716 (2013.01); H01L 29/0615 (2013.01); H01L 29/0634 (2013.01); H01L 29/32 (2013.01); H01L 29/7395 (2013.01); H01L 29/7397 (2013.01); H01L 29/7811 (2013.01); H01L 29/7813 (2013.01); H01L 27/0727 (2013.01); H01L 29/36 (2013.01); H01L 29/8613 (2013.01);
Abstract
In order to realize an SJ-MOSFET and an IGBT on a single chip and realize a new arrangement configuration for an SJ-MOSFET section and an IGBT section in a single semiconductor chip, provided is a semiconductor device including a semiconductor substrate; two or more super-junction transistor regions provided on the semiconductor substrate; and one or more IGBT regions that are provided in regions sandwiched by the two or more super-junction transistor regions, in a cross section obtained by cleaving along a pane perpendicular to the semiconductor substrate.