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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9558967 B1

PDFFull Text
Expired
Date of Patent:
Jan. 31, 2017

Filed:

Oct. 30, 2015

Method of manufacturing semiconductor device

Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Shinichi Uchida, Tokyo, JP;

Takafumi Kuramoto, Tokyo, JP;

Risho Koh, Tokyo, JP;

Assignee:

Renesas Electronics Corporation, Tokyo, JP;

Attorney:

McGinn IP Law Group, PLLC

Primary Examiner:

Peter Bradford

Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 21/56 (2006.01); H01L 49/02 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 21/3105 (2006.01); H01L 21/311 (2006.01); H01L 21/02 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01); H01L 23/58 (2006.01);
U.S. Cl.
CPC ...
H01L 21/56 (2013.01); H01L 21/02164 (2013.01); H01L 21/31051 (2013.01); H01L 21/31055 (2013.01); H01L 21/31144 (2013.01); H01L 21/768 (2013.01); H01L 23/3192 (2013.01); H01L 23/49575 (2013.01); H01L 23/5227 (2013.01); H01L 23/58 (2013.01); H01L 28/10 (2013.01); H01L 2224/05554 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/48465 (2013.01); H01L 2224/49171 (2013.01); H01L 2224/73215 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/92147 (2013.01); H01L 2224/92247 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/181 (2013.01);
Abstract

An improvement is achieved in the reliability of a semiconductor device by preventing a dielectric breakdown between two semiconductor chips facing each other. During the manufacturing of first and second semiconductor chips, the process of planarizing the upper surfaces of insulating films is performed. Then, the first and second semiconductor chips are stacked via an insulating sheet with the respective insulating films of the first and second semiconductor chips facing each other such that the respective coils of the first and second semiconductor chips are magnetically coupled to each other.

Find Patent Forward Citations

Uchida, Shinichi. (2017). Method of manufacturing semiconductor device (U.S. Patent No. 9558967). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9558967

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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