The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 31, 2017
Filed:
Sep. 03, 2015
Applicant:
Kabushiki Kaisha Toshiba, Minato-ku, JP;
Inventors:
Assignee:
KABUSHIKI KAISHA TOSHIBA, Minato-ku, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 16/32 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 16/16 (2006.01); G11C 16/12 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 16/32 (2013.01); G11C 16/10 (2013.01); G11C 16/12 (2013.01); G11C 16/16 (2013.01); G11C 16/26 (2013.01); G11C 16/0483 (2013.01);
Abstract
A semiconductor device includes a memory circuit, a first FIFO, a second FIFO and an input/output circuit. The memory circuit outputs data. The first FIFO receives data from the memory circuit and outputs data synchronously with a first clock signal. The second FIFO receives data output from the first FIFO and outputs data synchronously with the first clock signal. The input/output circuit outputs data output from the second FIFO. The second FIFO is disposed closer to the input/output circuit than the first FIFO.