The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9558811 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 31, 2017

Filed:

Aug. 20, 2015
Applicant:

Marvell International Ltd., Hamilton HM, BM;

Inventors:

Winston Lee, Palo Alto, CA (US);

Donald Lee, Fremont, CA (US);

Peter Lee, Pleasanton, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/419 (2006.01); G11C 11/412 (2006.01); G11C 11/413 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 11/412 (2013.01); G11C 11/413 (2013.01);
Abstract

A circuit includes a latch circuit, a buffer transistor having a control terminal coupled to a first output of the latch, a first write transistor having a conduction terminal coupled to the first output and a control terminal coupled to a first write bitline, and a second write transistor having a conduction terminal coupled to a second output of the latch and a control terminal coupled to a second write bitline. A method of operating a memory cell circuit includes providing a first value on first and second write bitlines when a read operation is performed, and when a write operation is performed, providing first and second values on the first and second write bitlines, respectively, when a first storable value is to be stored, and providing the first and second value on the second and first write bitlines, respectively, when a second storable value is to be stored.


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