The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2017

Filed:

Feb. 03, 2012
Applicants:

Kan Murata, Kanagawa, JP;

Hideyuki Noda, Kanagawa, JP;

Masaru Haraguchi, Kanagawa, JP;

Inventors:

Kan Murata, Kanagawa, JP;

Hideyuki Noda, Kanagawa, JP;

Masaru Haraguchi, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/78 (2006.01); G06F 15/80 (2006.01); G06F 12/04 (2006.01); G06F 7/57 (2006.01); G06F 7/483 (2006.01);
U.S. Cl.
CPC ...
G06F 15/7821 (2013.01); G06F 7/57 (2013.01); G06F 12/04 (2013.01); G06F 15/8007 (2013.01); G06F 7/483 (2013.01); G06F 2207/3812 (2013.01); Y02B 60/1207 (2013.01); Y02B 60/1225 (2013.01);
Abstract

Disclosed is a data processing device capable of efficiently performing an arithmetic process on variable-length data and an arithmetic process on fixed-length data. The data processing device includes first PEs of SIMD type, SRAMs provided respectively for the first PEs, and second PEs. The first PEs each perform an arithmetic operation on data stored in a corresponding one of the SRAMs. The second PEs each perform an arithmetic operation on data stored in corresponding ones of the SRAMs. Therefore, the SRAMs can be shared so as to efficiently perform the arithmetic process on variable-length data and the arithmetic process on fixed-length data.


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