The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2017

Filed:

Mar. 06, 2015
Applicants:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Iucf-hyu (Industry-university Cooperation Foundation Hanyang University), Seoul, KR;

Inventors:

Yun-Jung Kim, Yongin-si, KR;

Jong-Boo Kim, Seoul, KR;

Oh-Kyong Kwon, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 1/21 (2006.01); H04N 5/378 (2011.01); H04N 5/357 (2011.01);
U.S. Cl.
CPC ...
H04N 1/2129 (2013.01); H04N 5/3575 (2013.01); H04N 5/378 (2013.01);
Abstract

Arithmetic memories, image sensors including the arithmetic memories and methods of operating the arithmetic memories are provided. The arithmetic memories may include an input block to which a digital pixel reset signal and a digital pixel image signal are input and a plurality of unit cells configured to generate a digital difference signal. The input block may include first and second multiplexers to which the digital pixel reset signal and the digital pixel image signal are input and an inverter connected to the first multiplexer. The plurality of unit cells may include a first unit cell connected to the input block and a second unit cell through an N-th unit cell successively connected to the first unit cell. N may be two or greater. The first unit cell may include third and fourth multiplexers, a first flip/flop, and a first AND gate.


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