The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2017

Filed:

Dec. 07, 2015
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventor:

Yoshitaka Hirai, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01); H04L 7/033 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0331 (2013.01);
Abstract

According to one embodiment, a PLL circuit includes: a phase comparator (); a pulse width control unit that adjusts a pulse width of comparison results (UP, DN) of the phase comparator () and outputs comparison results (UPi, DNi) having a pulse width smaller than that of comparison results (UPp, DNp); a charge pump () that outputs a current (Ip) according to the comparison results (UPp, DNp); a charge pump () that outputs a current (Ii) according to the comparison results (UPi, DNi); a filter () that removes a high-frequency component of a voltage generated based on the current (Ip) and outputs a control voltage (Vp); a filter () that outputs, as a control voltage (Vi), a result obtained by integrating the current (Ii); and a voltage control oscillator () that generates an oscillating signal having a frequency according to the control voltage (Vp, Vi).


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