The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 2017
Filed:
Dec. 15, 2015
Freescale Semiconductor, Inc., Austin, TX (US);
Atul Gupta, Noida, IN;
Risi Jaiswal, Chauk-Bazar, IN;
FREESCALE SEMICONDUCTOR, INC., Austin, TX (US);
Abstract
A DLL includes a phase detector, a counter, a delay circuit, and a false-lock detection and recovery circuit. The false-lock detection and recovery circuit checks whether the DLL is in a true-lock condition or not, based on an average of a phase difference between a clock signal and an intermediate clock signal. The intermediate clock signal is generated by the delay circuit based on a count value generated by the counter and a select signal generated by the false-lock detection and recovery circuit. The false-lock detection and recovery circuit generates and provides a control signal to the counter. Based on the control signal, the counter modifies the count on which a delay between the clock signal and an output signal of the DLL depends when the DLL is not in the true-lock condition.