The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2017

Filed:

Nov. 01, 2015
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Zhe Ge, Suzhou, CN;

Zhiwei Lu, Suzhou, CN;

Miaolin Tan, Suzhou, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0013 (2013.01); H03K 19/20 (2013.01);
Abstract

A multi-module integrated circuit (IC) can be configured in different types of packages having different modules enabled or disabled. A module that can be disabled has driven circuitry that is known a priori to have a low-power input vector that places the driven circuitry into a low leakage power state. The module also has driving circuitry with one or more package-aware cells. The IC has a package-aware controller that generates control signals for the package-aware cells that ensure that the outputs from the package-aware cells are forced to particular values (i.e., either logical-0 or logical-1) that cause the low power input vector to be applied to the driven circuitry when the IC is assembled in a package in which the module is disabled. In this way, module leakage power is reduced for package types in which certain modules are disabled.


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