The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2017

Filed:

Nov. 20, 2015
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventor:

Eugenio Miluzzi, Milan, IT;

Assignee:

STMICROELECTRONICS S.R.L., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 5/00 (2006.01); H03K 5/135 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 5/135 (2013.01); H03K 2005/00052 (2013.01);
Abstract

A method and apparatus for mitigating offsets in an interpolator are disclosed. In the method and apparatus, a first number of clock cycles of a first clock signal observed over a first clock cycle of a second clock signal is determined and then stored. Also a second number of clock cycles of the first clock signal observed over a second clock cycle of the second clock signal subsequent to the first clock cycle is determined and stored. The first number of clock cycles and the second number of clock cycles are compared to determine whether they are different from each other. If they are different from each other, a reset signal is asserted under control of the second clock signal to reset at least one of a derivator stage and an integrator stage of an interpolator.


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