The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2017

Filed:

Jan. 21, 2015
Applicant:

Ford Global Technologies, Llc, Dearborn, MI (US);

Inventors:

Michael W. Degner, Novi, MI (US);

Chingchi Chen, Ann Arbor, MI (US);

Jun Kikuchi, Novi, MI (US);

Assignee:

FORD GLOBAL TECHNOLOGIES, LLC, Dearborn, MI (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02P 1/30 (2006.01); H02P 1/52 (2006.01); H02P 3/00 (2006.01); H02P 7/06 (2006.01); H02P 27/04 (2016.01); H02P 27/08 (2006.01); H02M 7/5387 (2007.01); H02M 5/458 (2006.01); G01R 31/42 (2006.01); G01R 19/00 (2006.01); H02M 1/38 (2007.01);
U.S. Cl.
CPC ...
H02P 27/08 (2013.01); H02M 7/53875 (2013.01); G01R 19/0092 (2013.01); G01R 31/42 (2013.01); H02M 5/458 (2013.01); H02M 2001/385 (2013.01); H02P 27/04 (2013.01);
Abstract

A power converter has a phase leg with upper and lower switching devices coupled across a DC link. A junction between the devices is coupled to a load. A current sensor detects direction of current flow from the junction to the load. A gate driver activates the devices according to upper and lower gate signals in response to pulse-width modulation (PWM) to generate nominal gate signals from a variable duty cycle. When the positive current direction is detected then the upper gate signal has turn-on and turn-off times shifted by a predetermined offset with respect to the nominal signals, and dead-times are added to the lower gate signals. When the negative direction is detected then the lower gate signal has turn-on and turn-off times shifted by the predetermined offset with respect to the nominal signals, and dead-times are added to the upper gate signals.


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