The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2017

Filed:

Aug. 25, 2015
Applicant:

Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;

Inventors:

Hiroaki Sekikawa, Tokyo, JP;

Hidenori Sato, Tokyo, JP;

Yotaro Goto, Tokyo, JP;

Takuya Maruyama, Tokyo, JP;

Masaaki Shinohara, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01); H01L 27/146 (2006.01); H01L 21/768 (2006.01); H01L 21/3105 (2006.01); H01L 21/66 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14636 (2013.01); H01L 21/31051 (2013.01); H01L 21/7685 (2013.01); H01L 21/76801 (2013.01); H01L 21/76877 (2013.01); H01L 22/30 (2013.01); H01L 27/14603 (2013.01); H01L 27/14687 (2013.01); H01L 23/53238 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A connection portion connects a copper-based first wiring layer with a copper-based second wiring layer arranged on the upper side of a first diffusion barrier film. The first diffusion barrier film includes a first opening region formed in a semiconductor circuit region that is a partial region in a two-dimensional view and a second opening region formed as an opening region different from the first opening region in a two-dimensional view. The opening regions are formed in a region different from an opening region formed to allow the connection portion to pass through the first diffusion barrier film. A mark wiring layer is arranged immediately above the second opening region as the same layer as the second wiring layer. A second diffusion barrier film is arranged in contact with the upper surface of the mark wiring layer.


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