The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2017

Filed:

Mar. 28, 2016
Applicants:

Boe Technology Co., Ltd., Beijing, CN;

Hefei Xinsheng Optoelectronics Technology Co., Ltd., Hefei, Anhui, CN;

Inventor:

Liping Liu, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 27/12 (2006.01); H01L 29/423 (2006.01); G02B 5/22 (2006.01);
U.S. Cl.
CPC ...
H01L 27/124 (2013.01); G02B 5/22 (2013.01); H01L 27/1259 (2013.01); H01L 29/42356 (2013.01);
Abstract

The invention discloses an array substrate, a display panel and methods of manufacturing the same, and a display device. The array substrate comprises: a pixel region and a wiring region located outside the wiring region; a gate line and a data line each arranged within both the pixel and wiring regions; a passivation layer arranged to cover the gate and data lines and provided therein with trenches respectively exposing and being wider than the gate and data lines within the wiring region; first and second signal line partially arranged within the trenches respectively and contacting exposed portions of the gate and data lines to transmit signals to the gate and gate lines respectively, the first and second signal line each having widths equal to those of the trenches respectively. With the invention, good electrical connections between the signal line and the gate and data lines are enabled.


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