The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 2017
Filed:
Jul. 06, 2015
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Michaela Braun, Regensburg, DE;
Markus Menath, Regensburg, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/78 (2006.01); H01L 21/66 (2006.01); H01L 23/31 (2006.01); H01L 21/683 (2006.01); H01L 21/3065 (2006.01);
U.S. Cl.
CPC ...
H01L 21/78 (2013.01); H01L 21/3065 (2013.01); H01L 21/6835 (2013.01); H01L 21/6836 (2013.01); H01L 22/34 (2013.01); H01L 23/3121 (2013.01); H01L 2221/68327 (2013.01);
Abstract
In one embodiment, a wafer includes a number of die areas each including a semiconductor device and dedicated to become a separate die. The die areas are disposed on a first face of the wafer and wherein adjacent die areas are distanced from one another. A first trench and a second trench are formed on the first face between adjacent die areas. The first trench and the second trench are spaced apart from one another by a ridge. A third trench is disposed above the ridge on a second face of the wafer.