The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2017

Filed:

Dec. 19, 2012
Applicant:

Maxim Integrated Products, Inc., San Jose, CA (US);

Inventors:

Edward Tangkwai Ma, Plano, TX (US);

Nancy Kow Lida, Irving, TX (US);

Sung Ung Kwak, Frisco, TX (US);

Khankap Mounarath, Frisco, TX (US);

Robert Michael Muchsel, Addison, TX (US);

Hung Thanh Nguyen, Plano, TX (US);

Gary Zanders, Fairview, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); H03K 19/00 (2006.01); G06F 17/50 (2006.01); G06F 1/20 (2006.01); G06F 15/78 (2006.01); G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0016 (2013.01); G06F 1/206 (2013.01); G06F 1/3237 (2013.01); G06F 1/3287 (2013.01); G06F 9/3871 (2013.01); G06F 15/7825 (2013.01); G06F 17/5072 (2013.01); G06F 2207/3864 (2013.01);
Abstract

Various embodiments of the invention allow to effectively reduce device and system power consumption in both active and inactive modes without compromising performance, without large area overhead, and at low cost. In certain embodiments, the reduction of power consumption is accomplished by combining circuit control techniques with power gating methods to reduce power loss due to leakage current.


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