The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2017

Filed:

Dec. 29, 2014
Applicant:

Snaptrack, Inc., San Diego, CA (US);

Inventors:

Gerard Wimpenny, Cambourne, GB;

Martin Paul Wilson, Cambourne, GB;

Assignee:

SnapTrack, Inc., San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/02 (2006.01); H03F 3/26 (2006.01); G05F 1/66 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0205 (2013.01); G05F 1/66 (2013.01); H03F 1/025 (2013.01); H03F 1/0222 (2013.01); H03F 3/265 (2013.01); H03F 2200/102 (2013.01); H03F 2200/375 (2013.01); H03F 2200/451 (2013.01); H03F 2200/537 (2013.01); H03F 2200/541 (2013.01);
Abstract

There is provided an output stage comprising: a phase splitter for receiving an input signal and for generating first and second drive signals of opposite phase in dependence thereon; a DC offset signal generator for generating a DC offset signal; an adder for adding the DC offset signal to the first drive signal to provide a first modified drive signal; a subtractor for subtracting the DC offset signal from the second drive signal to provide a second modified drive signal; a first drive transistor associated with a first power supply voltage, for generating a first output signal in dependence on the first modified drive signal; a second drive transistor associated with a second power supply voltage, for generating a second output signal in dependence on the second modified drive signal; and a combiner for combining the first and second output signals to generate a phase combined output signal.


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