The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2017

Filed:

Jul. 24, 2015
Applicant:

National Chiao Tung University, Hsinchu, TW;

Inventors:

Steve S. Chung, Hsinchu, TW;

E-Ray Hsieh, Kaohsiung, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/792 (2006.01); H01L 27/24 (2006.01); G11C 13/00 (2006.01); H01L 45/00 (2006.01); G11C 8/14 (2006.01);
U.S. Cl.
CPC ...
H01L 29/792 (2013.01); G11C 13/0069 (2013.01); G11C 13/0097 (2013.01); H01L 27/2436 (2013.01); H01L 27/2463 (2013.01); H01L 45/1253 (2013.01); H01L 45/145 (2013.01); G11C 8/14 (2013.01); H01L 45/04 (2013.01); H01L 45/1233 (2013.01); H01L 45/16 (2013.01);
Abstract

A high density NAND-type nonvolatile resistance random access storage circuit and its operations are shown herein . A unit memory cell of the circuit includes a field effect transistor (FET) with a resistance changeable component connected to its gate electrode. The field effect transistor is an n-channel field effect transistor or a p-channel field effect transistor. By applying the voltage or current between the top electrode of the resistive random access component and the FET drain or source electrode, more than two stable states can be maintained such that these states can be drawn from the FET drain or source terminal. The NAND circuit includes the above unit cell as a center to form a multi-bit memory. The circuit consists of multi-bit memories connected in series, has a NAND logic gate function, and forms output of this NAND circuit which can be drawn in a form of series output.


Find Patent Forward Citations

Loading…