The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2017

Filed:

Apr. 02, 2015
Applicant:

Samsung Display Co., Ltd., Yongin, Gyeonggi-Do, KR;

Inventors:

June-Woo Lee, Yongin, KR;

Jae-Beom Choi, Yongin, KR;

Kwan-Wook Jung, Yongin, KR;

Jae-Hwan Oh, Yongin, KR;

Seong-Hyun Jin, Yongin, KR;

Kwang-Hae Kim, Yongin, KR;

Jong-Hyun Choi, Yongin, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD, Yongin, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 27/32 (2006.01); H01L 51/52 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1237 (2013.01); H01L 27/127 (2013.01); H01L 27/1255 (2013.01); H01L 27/1288 (2013.01); H01L 27/3265 (2013.01); H01L 51/5215 (2013.01); H01L 51/5265 (2013.01); H01L 27/3276 (2013.01); H01L 29/66742 (2013.01); H01L 2227/323 (2013.01);
Abstract

A thin film transistor (TFT) array substrate is provided that includes a TFT on a substrate. The TFT can include an active layer, gate electrode, source electrode, drain electrode, first insulating layer between the active layer and the gate electrode, and second insulating layer between the gate electrode and the source and drain electrodes. A pixel electrode is disposed on the first and second insulating layers. A capacitor including a lower electrode is disposed on a same layer as the gate electrode and an upper electrode. A third insulating layer directly between the second insulating layer and the pixel electrode and between the lower electrode and the upper electrode. A fourth insulating layer covers the source electrode, the drain electrode, and the upper electrode, and exposes the pixel electrode and can further expose a pad electrode.


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