The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2017

Filed:

Mar. 23, 2015
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Vivek Joshi, San Jose, CA (US);

Sriram Balasubramanian, Fremont, CA (US);

Chad Weintraub, Austin, TX (US);

Yoann Mamy Randriamihaja, Cohoes, NY (US);

William McMahon, Scarsdale, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 29/04 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 29/04 (2013.01); G11C 11/419 (2013.01);
Abstract

A method and an apparatus for identifying non-intrinsic defect bits from a population of failing bits for failure analysis to characterize the extrinsic failure mechanisms is provided. Embodiments include performing a failure mode test on a bank of a memory array at different low VDD; determining optimal bank size to observe plateaus of fail counts; determining fail counts of the bank at each different low VDD; determining a plateau of the fail counts; determining whether the plateau represents extrinsic bits of the bank; and submitting the extrinsic bits for root cause analysis.


Find Patent Forward Citations

Loading…