The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 10, 2017
Filed:
Aug. 27, 2014
Semiconductor device including junction field effect transistor and method of manufacturing the same
Applicant:
Renesas Electronics Corporation, Kawasaki-shi, JP;
Inventor:
Koichi Arai, Kawasaki, JP;
Assignee:
RENESAS ELECTRONICS CORPORATION, Kawasaki-Shi, Kanagawa, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/808 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01); H01L 29/16 (2006.01); H01L 21/04 (2006.01);
U.S. Cl.
CPC ...
H01L 29/8083 (2013.01); H01L 21/046 (2013.01); H01L 29/1066 (2013.01); H01L 29/1608 (2013.01); H01L 29/66068 (2013.01); H01L 29/1058 (2013.01); H01L 29/66909 (2013.01);
Abstract
An on-resistance of a junction FET is reduced. In a semiconductor device in an embodiment, a gate region of the junction field effect transistor includes a low concentration gate region and a high concentration gate region whose impurity concentration is higher than an impurity concentration of the low concentration gate region, and the high concentration gate region is included in the low concentration gate region.