The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2017

Filed:

May. 09, 2011
Applicants:

Yang Du, Carlsbad, CA (US);

Vladimir Aparin, San Diego, CA (US);

Robert P. Gilmore, Poway, CA (US);

Inventors:

Yang Du, Carlsbad, CA (US);

Vladimir Aparin, San Diego, CA (US);

Robert P. Gilmore, Poway, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0653 (2013.01); H01L 29/0692 (2013.01); H01L 29/402 (2013.01); H01L 29/42384 (2013.01); H01L 29/66659 (2013.01); H01L 29/66689 (2013.01); H01L 29/7824 (2013.01); H01L 29/7835 (2013.01); H01L 29/78624 (2013.01); H01L 29/78645 (2013.01); H01L 29/1045 (2013.01);
Abstract

High-speed high-power semiconductor devices are disclosed. In an exemplary design, a high-speed high-power semiconductor device includes a source, a drain to provide an output signal, and an active gate to receive an input signal. The semiconductor device further includes at least one field gate located between the active gate and the drain, at least one shallow trench isolation (STI) strip formed transverse to the at least one field gate, and at least one drain active strip formed parallel to, and alternating with, the at least one STI strip. The semiconductor device may be modeled by a combination of an active FET and a MOS varactor. The active gate controls the active FET, and the at least one field gate controls the MOS varactor. The semiconductor device has a low on resistance and can handle a high voltage.


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