The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2017

Filed:

Oct. 20, 2015
Applicant:

Everspin Technologies, Inc., Chandler, AZ (US);

Inventors:

Dietmar Gogl, Austin, TX (US);

Syed M. Alam, Austin, TX (US);

Thomas Andre, Austin, TX (US);

Assignee:

Everspin Technologies, Inc., Chandler, AZ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/16 (2006.01); G11C 13/00 (2006.01); G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
G11C 11/1675 (2013.01); G11C 5/147 (2013.01); G11C 11/1697 (2013.01); G11C 13/0069 (2013.01); G11C 2213/79 (2013.01);
Abstract

A cell bias control circuit maximizes the performance of devices in the read/write path of memory cells (magnetic tunnel junction device+transistor) without exceeding leakage current or reliability limits by automatically adjusting multiple control inputs of the read/write path at the memory array according to predefined profiles over supply voltage, temperature, and process corner variations by applying any specific reference parameter profiles to the memory array.


Find Patent Forward Citations

Loading…