The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2017

Filed:

Jul. 09, 2014
Applicant:

Google Inc., Mountain View, CA (US);

Inventors:

Junlan Zhou, Sunnyvale, CA (US);

Amin Vahdat, Los Altos, CA (US);

Peter Peresini, Banska Bystrica, SK;

Assignee:

Google Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/751 (2013.01); H04L 12/24 (2006.01);
U.S. Cl.
CPC ...
H04L 41/084 (2013.01); H04L 41/0813 (2013.01); H04L 41/0823 (2013.01); H04L 41/0883 (2013.01); H04L 41/145 (2013.01);
Abstract

The present disclosure presents a system and method for determining a logical topology of a network, given the network's physical topology. More particularly, a logical topology is implemented across a plurality of optical circuit switches that interconnect the nodes of a network. Each of the optical circuit switches includes an initial internal configuration. The internal configuration of the optical circuit switches are swapped to generate new logical topologies. A fitness is determined for each of the generated topologies. The fitnesses of the topologies are then ranked and the most fit logical topology is implemented in the network.


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