The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 03, 2017
Filed:
Apr. 03, 2015
Hrl Laboratories, Llc, Malibu, CA (US);
Peter D. Brewer, Westlake Village, CA (US);
Dana C. Wheeler, Santa Monica, CA (US);
Tahir Hussain, Calabasas, CA (US);
Kyung-Ah Son, Moorpark, CA (US);
Hyok J. Song, Camarillo, CA (US);
Harris P. Moyer, Los Angeles, CA (US);
Joseph S. Colburn, Malibu, CA (US);
James H. Schaffner, Chatsworth, CA (US);
HRL Laboratories, LLC, Malibu, CA (US);
Abstract
The disclosed antenna structures and electronic microsystems are capable of physically disappearing in a controlled, triggerable manner. Some variations provide an on-chip transient antenna comprising a semiconductor substrate containing ion-implanted hydrogen atoms and a conductor network comprising metals bridged by low-melting-temperature metals. Some variations provide an off-chip transient antenna comprising a flexible substrate containing a polymer, nanoporous silicon particles, and an oxidant for silicon, and a conductor network comprising metals bridged by low-melting-temperature metals. Other variations provide a method of introducing physical transience to a semiconductor integrated circuit, comprising thinning a substrate from the back side, implanting hydrogen ions into the thinned substrate to introduce latent structural flaws, depositing a semiconductor integrated circuit or sensor chip, and providing a controllable heating source capable of activating the latent structural flaws. These novel approaches are compatible with existing integrated circuits processing, preserve antenna performance, and use foundry-compatible techniques.