The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2016

Filed:

Nov. 29, 2013
Applicant:

Panasonic Corporation, Osaka, JP;

Inventors:

Yoshito Hirai, Kanagawa, JP;

Kouji Okamoto, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/26 (2006.01); H03F 1/32 (2006.01); H03F 3/19 (2006.01); H03F 3/24 (2006.01); H04B 1/04 (2006.01); H03F 3/189 (2006.01);
U.S. Cl.
CPC ...
H03F 1/3247 (2013.01); H03F 3/189 (2013.01); H03F 3/19 (2013.01); H03F 3/24 (2013.01); H04B 1/0475 (2013.01); H03F 2200/451 (2013.01); H03F 2201/3224 (2013.01); H04B 2001/0425 (2013.01);
Abstract

Disclosed is a distortion-compensation apparatus that can reduce the storage space for storing coefficients required for distortion-compensation calculation, and can accurately execute distortion compensation. Distortion-compensation apparatus () compensates for distortion of an output signal from a predetermined circuit by predistortion in which an input signal is preliminarily multiplied by a coefficient. First multiplication section () of distortion-compensation apparatus () multiplies an input signal by a first coefficient selected from coefficient candidates in accordance with the input signal; second multiplication section (to) multiplies a delay signal of an input signal by a tap coefficient; and adding section () outputs a signal obtained by adding together an input signal multiplied by the compensation coefficient and the delay signal multiplied by the tap coefficient to the predetermined circuit.


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