The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9530859 B1

PDF
Full Text
Expired
Date of Patent:
Dec. 27, 2016

Filed:

Nov. 21, 2013
Applicants:

Shuhei Oki, Nagakute, JP;

Tsuyoshi Nishiwaki, Nagakute, JP;

Inventors:

Shuhei Oki, Nagakute, JP;

Tsuyoshi Nishiwaki, Nagakute, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/22 (2006.01); H01L 29/739 (2006.01); H01L 29/66 (2006.01); H01L 29/36 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66348 (2013.01); H01L 29/36 (2013.01); H01L 29/7397 (2013.01);
Abstract

A manufacturing method for a semiconductor device including a drift layer; a body layer contacting a front surface of the drift layer; an emitter layer provided on a portion of a front surface of the body layer and exposed on the front surface of the substrate; a buffer layer contacting a back surface of the drift layer; a collector layer contacting a back surface of the buffer layer and exposed on a back surface of the substrate; and a gate electrode facing, via an insulator, the body layer in an area where the body layer separates the emitter layer from the drift layer, includes preparing a wafer that includes a first layer, and a second layer layered on a back surface of the first layer and having a higher polycrystalline silicon concentration than the first layer, and forming the buffer layer by implanting and diffusing ions in the second layer.


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