The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2016

Filed:

Aug. 27, 2014
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventor:

Jonathan Michael Stern, San Carlos, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14687 (2013.01); H01L 24/81 (2013.01); H01L 24/85 (2013.01); H01L 27/14618 (2013.01); H01L 27/14683 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/85 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/014 (2013.01); H01L 2924/12043 (2013.01);
Abstract

An image sensor die may include a pixel array formed in an image sensor substrate. The image sensor die may be mounted to a thin metal interconnect layer that has been deposited on a sacrificial carrier substrate. The thin metal interconnect layer may include one or more metal layers that are patterned to form metal traces that serve as contact pads, signal lines, and other interconnects in the interconnect layer. The image sensor die may be wire bonded, flip-chip mounted, or otherwise mechanically and electrically coupled to the metal interconnect layer. The sacrificial carrier substrate may be etched or otherwise removed to expose the metal interconnects on the metal interconnect layer. An array of solder balls may be formed on the exposed metal interconnects to form a ball grid array package, or the exposed contact pads may be plated to form a leadless chip carrier package.


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