The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9530483 B1

PDF
Full Text
Expired
Date of Patent:
Dec. 27, 2016

Filed:

Aug. 24, 2015
Applicant:

Src Labs, Llc, Chaska, MN (US);

Inventor:

Timothy J. Tewalt, Larkspur, CO (US);

Assignee:

SRC Labs, LLC, Colorado Springs, CO (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 11/406 (2006.01); G06F 13/16 (2006.01); G11C 11/4072 (2006.01);
U.S. Cl.
CPC ...
G11C 11/40615 (2013.01); G06F 13/1668 (2013.01); G06F 13/1694 (2013.01); G11C 11/4072 (2013.01);
Abstract

A system and method for retaining dynamic random access memory (DRAM) data when reprogramming reconfigurable devices with DRAM memory controllers such as field programmable gate arrays (FPGAs). The DRAM memory controller is utilized in concert with a data maintenance block collocated with the DRAM memory and coupled to an I2C interface of the reconfigurable device, wherein the FPGA drives the majority of the DRAM input/output (I/O) and the data maintenance block drives the self-refresh command inputs. Even though the FPGA reconfigures and the majority of the DRAM inputs are tri-stated, the data maintenance block provides stable input levels on the self-refresh command inputs.


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