The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2016

Filed:

May. 29, 2013
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Juergen Helmschmidt, Gilching, DE;

Fabio Parodi, Genoa, IT;

Stephan Schoenfeldt, Hoehenkrichen-Siegertsbrunn, DE;

Sergio Rossi, Genoa, IT;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/26 (2006.01); G06F 21/60 (2013.01); H04L 9/32 (2006.01); G06F 21/72 (2013.01); G06F 21/74 (2013.01); G01R 22/10 (2006.01); G06F 21/57 (2013.01);
U.S. Cl.
CPC ...
G06F 21/60 (2013.01); G06F 13/26 (2013.01); G06F 21/602 (2013.01); G06F 21/604 (2013.01); G06F 21/725 (2013.01); G06F 21/74 (2013.01); H04L 9/3247 (2013.01); G01R 22/10 (2013.01); G06F 21/575 (2013.01); H04L 2209/12 (2013.01); Y02B 60/1228 (2013.01);
Abstract

In accordance with an embodiment, a method of operating a processor includes operating in a first operating mode that prohibits access to a protected memory area, receiving a priority interrupt (PI) signal, operating in a second operating mode in response to receiving the PI signal, and executing a first routine by asserting a semi-privileged interrupt (SPI). Access to the protected memory area is permitted in the second operating mode, and the first routine operates in the second operating mode and is interruptible by the PI signal.


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