The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 27, 2016
Filed:
Jan. 27, 2015
Xilinx, Inc., San Jose, CA (US);
Grigor S. Gasparyan, San Jose, CA (US);
Xiao Dong, San Jose, CA (US);
Marvin Tom, Cupertino, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
Placing a circuit design may include partitioning circuit elements of the circuit design into circuit element sets and grouping bins of an integrated circuit into bin sets. The bins include circuit elements of the circuit design from an initial placement. Placing a circuit design also may include determining a dependency connectivity metric for the circuit elements and, using a processor, selectively relocating circuit elements concurrently, for a plurality of iterations, using a cost metric for relocating the circuit elements and using an order of processing the circuit elements determined from the bin sets, the circuit element sets, and the dependency connectivity metrics.