The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2016

Filed:

Nov. 30, 2010
Applicants:

Manish K. Shah, Austin, TX (US);

Jama I. Barreh, Austin, TX (US);

Inventors:

Manish K. Shah, Austin, TX (US);

Jama I. Barreh, Austin, TX (US);

Assignee:

Oracle International Corporation, Redwood Shores, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3802 (2013.01); G06F 9/3814 (2013.01); G06F 9/3851 (2013.01); G06F 9/5027 (2013.01);
Abstract

A multi-threaded processor configured to allocate entries in a buffer for instruction cache misses is disclosed. Entries in the buffer may store thread state information for a corresponding instruction cache miss for one of a plurality of threads executable by the processor. The buffer may include dedicated entries and dynamically allocable entries, where the dedicated entries are reserved for a subset of the plurality of threads and the dynamically allocable entries are allocable to a group of two or more of the plurality of threads. In one embodiment, the dedicated entries are dedicated for use by a single thread and the dynamically allocable entries are allocable to any of the plurality of threads. The buffer may store two or more entries for a given thread at a given time. In some embodiments, the buffer may help ensure none of the plurality of threads experiences starvation with respect to instruction fetches.


Find Patent Forward Citations

Shah, Manish. (2016). Miss buffer for a multi-threaded processor (U.S. Patent No. 9529594). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9529594

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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