The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 27, 2016
Filed:
Jul. 12, 2013
Mitsubishi Electric Corporation, Tokyo, JP;
Mitsunobu Yoshinaga, Tokyo, JP;
Tadashi Oi, Tokyo, JP;
Shinichiro Tsudaka, Tokyo, JP;
Masayo Nakagawa, Tokyo, JP;
Mitsubishi Electric Corporation, Tokyo, JP;
Abstract
A technique capable of estimating an error point in a logic diagram appropriately. A logic diagram display device includes: a signal line correctness/incorrectness determining unit that determines for each test whether each signal line in the logic diagram is correct or incorrect based on a signal line status value of each signal line and a test table; and a signal line correctness/incorrectness result summarizing unit that calculates a correctness/incorrectness result summarized value of each signal line based on a result of determination about the correctness or incorrectness of each signal line. The logic diagram display device further includes: an error signal line estimating unit that estimates an error in each signal line based on the correctness/incorrectness result summarized value of each signal line; and a display that displays each signal line in the logic diagram in a display style responsive to the error in each signal line.