The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2016

Filed:

Mar. 10, 2016
Applicant:

Vanguard International Semiconductor Corporation, Hsinchu, TW;

Inventors:

Chia-Hao Lee, New Taipei, TW;

Pei-Heng Hung, New Taipei, TW;

Chih-Cherng Liao, Jhudong Township, TW;

Jun-Wei Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 27/088 (2006.01); H01L 21/223 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66734 (2013.01); H01L 21/223 (2013.01); H01L 27/088 (2013.01); H01L 29/0634 (2013.01); H01L 29/0638 (2013.01); H01L 29/42368 (2013.01); H01L 29/42376 (2013.01); H01L 29/7813 (2013.01);
Abstract

A semiconductor device and a method for forming the same are provided. The semiconductor device includes a substrate having a first conductive type and an epitaxial layer having the first conductive type disposed over the substrate, wherein a trench is formed in the epitaxial layer. The semiconductor device also includes a polysilicon layer having the first conductive type disposed in the trench. The semiconductor device further includes a doped region having a second conductive type disposed along a sidewall and a bottom of the trench in the epitaxial layer, wherein a thickness along the sidewall and the bottom of the trench is uniform, and wherein the thickness is a vertical distance between the outermost side of the trench to the sidewall or the bottom of the trench.


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