The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 2016
Filed:
May. 17, 2012
Hidekazu Miyairi, Atsugi, JP;
Koji Dairiki, Atsugi, JP;
Yasuhiro Jinbo, Atsugi, JP;
Tomohiro Kimura, Osaka, JP;
Yoshitaka Yamamoto, Osaka, JP;
Hidekazu Miyairi, Atsugi, JP;
Koji Dairiki, Atsugi, JP;
Yasuhiro Jinbo, Atsugi, JP;
Tomohiro Kimura, Osaka, JP;
Yoshitaka Yamamoto, Osaka, JP;
Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;
Sharp Kabushiki Kaisha, Osaka-shi, Osaka, JP;
Abstract
One embodiment of the present invention is a semiconductor device which includes a gate electrode; a gate insulating film formed to cover the gate electrode; a semiconductor layer formed over the gate insulating film and placed above the gate electrode; a second insulating film formed over the semiconductor layer; a first insulating film formed over a top surface and a side surface of the second insulating film, a side surface of the semiconductor layer, and the gate insulating film; silicon layers and which are formed over the first insulating film and electrically connected to the semiconductor layer; and a source electrode and a drain electrode which are formed over the silicon layers. The source electrode and the drain electrode are electrically separated from each other over the first insulating film. The semiconductor layer is not in contact with each of the source electrode and the drain electrode.