The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2016

Filed:

Oct. 30, 2014
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Winfried Kaindl, Unterhaching, DE;

Franz Hirler, Isen, DE;

Armin Willmeroth, Augsburg, DE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 29/0634 (2013.01); H01L 29/0878 (2013.01); H01L 29/4238 (2013.01); H01L 29/7802 (2013.01); H01L 29/7813 (2013.01); H01L 29/1095 (2013.01);
Abstract

The present disclosure provides a semiconductor device, which includes a compensation area which includes p-regions and n-regions, and a plurality of transistor cells on the compensation area. Each of the plurality of transistor cells includes a source region, a body region, a gate and an interlayer dielectric, and a source metallization layer arranged on the interlayer dielectric. The semiconductor device further includes an additional n-doping region that is provided on top of the n-regions between two neighboring body regions, and a source plug which fills a contact hole formed through the interlayer dielectric between the source and body region and the source metallization layer, so as to electrically connect the source and body region and the source metallization layer.


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