The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2016

Filed:

Aug. 30, 2013
Applicant:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Inventors:

Lena E. Olson, Madison, WI (US);

Yasuko Eckert, Kirkland, WA (US);

Srilatha Manne, Portland, OR (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/312 (2006.01); G06F 9/345 (2006.01); G06F 9/52 (2006.01); G06F 12/08 (2016.01); G06F 9/30 (2006.01); G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30043 (2013.01); G06F 9/3836 (2013.01); G06F 9/3867 (2013.01); G06F 9/3826 (2013.01); G06F 9/3857 (2013.01); G06F 12/0875 (2013.01);
Abstract

A system and method for efficient predicting and processing of memory access dependencies. A computing system includes control logic that marks a detected load instruction as a first type responsive to predicting the load instruction has high locality and is a candidate for store-to-load (STL) data forwarding. The control logic marks the detected load instruction as a second type responsive to predicting the load instruction has low locality and is not a candidate for STL data forwarding. The control logic processes a load instruction marked as the first type as if the load instruction is dependent on an older store operation. The control logic processes a load instruction marked as the second type as if the load instruction is independent on any older store operation.


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