The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2016

Filed:

Apr. 07, 2015
Applicant:

Futurewei Technologies, Inc., Plano, TX (US);

Inventors:

Hongzhen Wei, Pleasanton, CA (US);

Li Yang, San Jose, CA (US);

Qianfan Xu, Denver, CO (US);

Xiao Shen, San Bruno, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/035 (2006.01); G02F 1/025 (2006.01); H01L 21/225 (2006.01); H01L 21/3215 (2006.01); H01L 21/306 (2006.01); G02F 1/015 (2006.01);
U.S. Cl.
CPC ...
G02F 1/025 (2013.01); H01L 21/2253 (2013.01); H01L 21/30604 (2013.01); H01L 21/3215 (2013.01); G02F 2001/0151 (2013.01);
Abstract

A silicon waveguide comprising a waveguide core that comprises a first positively doped (P1) region vertically adjacent to a second positively doped (P2) region. The P2 region is more heavily positively doped than the P1 region. A first negatively doped (N1) region is vertically adjacent to a second negatively doped (N2) region. The N2 region is more heavily negatively doped than the N1 region. The N2 region and the P2 region are positioned vertically adjacent to form a positive-negative (PN) junction. The N1 region, the N2 region, the P1 region, and the P2 region are positioned as a vertical PN junction and configured to completely deplete the P2 region of positive ions and completely deplete the N2 region of negative ions when a voltage drop is applied across the N1 region, the N2 region, the P1 region, and the P2 region.


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