The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2016

Filed:

Jun. 19, 2014
Applicant:

Avago Technologies General Ip (Singapore) Pte. Ltd., Singapore, SG;

Inventors:

Andrew C. Engel, Portola Valley, CA (US);

Michael J. Brosnan, Fremont, CA (US);

David J. K. Meadowcroft, San Jose, CA (US);

Klaus D. Giessler, Menlo Park, CA (US);

Paul Yu, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 5/00 (2006.01); H05K 1/02 (2006.01); H01L 23/373 (2006.01); H01L 23/367 (2006.01); H01L 25/065 (2006.01); H01L 23/498 (2006.01); H05K 1/18 (2006.01); H05K 1/11 (2006.01); H05K 7/00 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0216 (2013.01); H01L 23/3675 (2013.01); H01L 23/3736 (2013.01); H01L 23/49805 (2013.01); H01L 23/49838 (2013.01); H01L 25/0655 (2013.01); H05K 1/111 (2013.01); H05K 1/181 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48465 (2013.01); H01L 2224/48471 (2013.01); H01L 2224/73265 (2013.01);
Abstract

A mounting block is provided that has a multi-level upper surface that is used to mount one or more IC chips and the printed circuit board (PCB) thereon at heights that allow the lengths of the bond wires interconnecting the chips with the PCB and/or with the other IC chips to be reduced. The distances between the levels of the multi-level surface are preselected based at least in part on the known height of the PCB and the known height of at least one of the IC chips such that when the chip and the PCB are mounted on the mounting block, the distance between the contact pads of the PCB and the contact pads of the IC chip is very small, thereby allowing the lengths of the bond wires to be kept very short.


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