The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 2016
Filed:
Feb. 18, 2015
Glauco Rogerio Cugler-fiorante, Sao Paulo, BR;
Payman Zarkesh-ha, Albuquerque, NM (US);
Sanjay Krishna, Albuquerque, NM (US);
Glauco Rogerio Cugler-Fiorante, Sao Paulo, BR;
Payman Zarkesh-Ha, Albuquerque, NM (US);
Sanjay Krishna, Albuquerque, NM (US);
STC.UNM, Albuquerque, NM (US);
Abstract
Provided is a readout integrated circuit (ROIC). The ROIC includes a memory for each of a plurality of pixels, an address selector to synchronize a subsequent bias voltage for each of the pixels, a reference voltage recover switch to subtract the initial bias voltage from an output voltage of the integrated circuit and to result an integrator voltage for a sample and hold block, and a pulse-width control circuit to prevent crosstalk of the subsequent bias voltage between first and second ones of the pixels while a pixel clock selects adjacent columns. The memory maintains an initial bias voltage for each pixel during an initial integration frame time and during a sample and hold readout processing time. The sample and hold readout processing time is utilized to write a subsequent bias voltage for each pixel for a subsequent integration frame time to allow the first one of the pixels to have a different bias voltage than the second one of the pixels inside each integration frame time.