The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2016

Filed:

Apr. 25, 2014
Applicant:

Samsung Display Co., Ltd., Yongin, Gyeonggi-Do, KR;

Inventors:

Si Joon Song, Suwon-si, KR;

Hyuk Hwan Kim, Hwaseong-si, KR;

Seok Hyun Nam, Seoul, KR;

Byoung Dae Ye, Yongin-si, KR;

Young Keun Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
F21S 4/00 (2016.01); F21V 21/00 (2006.01); H01L 25/16 (2006.01); F21V 8/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/167 (2013.01); G02B 6/0073 (2013.01); G02B 6/0083 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01);
Abstract

A method of protecting an LED chip from damage by ESD and EMI when the LED chip is housed in a light-emitting diode(s) housing package (LED package) and the LED package is mounted on a printed circuit board is provided. The method comprises a step of not including an ESD and EMI suppressing Zener diode within the combination of the printed circuit board and the LED package and of providing within the combination of the printed circuit board and the LED package a first conductive member and a spaced apart second conductive member which are electrically connected to the LED chip and which have defined between them at least one insulative ESD and/or EMI suppressing region which breaks down in its insulative properties when subjected to voltages of absolute magnitudes greater than a predetermined threshold voltage.


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