The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2016

Filed:

Feb. 05, 2015
Applicant:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Inventor:

Akiko Nomachi, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 23/48 (2006.01); H01L 21/3065 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 21/3213 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/3065 (2013.01); H01L 21/3213 (2013.01); H01L 21/76898 (2013.01); H01L 24/10 (2013.01); H01L 24/11 (2013.01); H01L 29/0649 (2013.01); H01L 2924/13091 (2013.01);
Abstract

According to one embodiment, a semiconductor device includes a semiconductor substrate having a first surface and a second surface, and having a LSI on the first surface of the semiconductor substrate, a first insulating layer with an opening, the first insulating layer provided on the first surface of the semiconductor substrate, a conductive layer on the opening, the conductive layer being connected to the LSI, and a via extending from a second surface of the semiconductor substrate to the conductive layer through the opening, the via having a size larger than a size of the opening in a range from the second surface to a first interface between the semiconductor substrate and the first insulating layer, and having a size equal to the size of the opening in the opening.


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