The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2016

Filed:

Sep. 15, 2015
Applicants:

Donald L. Miller, Export, PA (US);

Andrew Hostetler Miklich, Columbia, MD (US);

Anna Y. Herr, Ellicott City, MD (US);

Quentin P. Herr, Ellicott City, MD (US);

William Robert Reohr, Severna Park, MD (US);

Inventors:

Donald L. Miller, Export, PA (US);

Andrew Hostetler Miklich, Columbia, MD (US);

Anna Y. Herr, Ellicott City, MD (US);

Quentin P. Herr, Ellicott City, MD (US);

William Robert Reohr, Severna Park, MD (US);

Assignee:

Northrop Grumman Systems Corporation, Falls Church, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/44 (2006.01); G11C 11/16 (2006.01);
U.S. Cl.
CPC ...
G11C 11/44 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01);
Abstract

One embodiment describes a JMRAM memory cell system. The system includes a phase hysteretic magnetic Josephson junction (PHMJJ) that stores one of a first binary state and a second binary state in response to a write current provided during a data write operation and to provide a superconducting phase based on the stored digital state. The system also includes a directional write element configured to provide a directional bias current during the data write operation to provide the superconducting phase of the PHMJJ in a predetermined direction corresponding to the first binary state. The system further includes at least one Josephson junction having a critical current that is based on the superconducting phase of the PHMJJ and being configured to provide an output corresponding to the stored digital state in response to a read current that is provided during a read operation.


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