The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2016

Filed:

Jun. 03, 2014
Applicant:

Empire Technology Development Llc, Wilmington, DE (US);

Inventors:

Andrew Wolfe, Los Gatos, CA (US);

Thomas Conte, Atlanta, GA (US);

Assignee:

EMPIRE TECHNOLOGY DEVELOPMENT LLC, Wilmington, DE (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01); G06F 11/34 (2006.01); G06F 1/08 (2006.01); G06F 9/48 (2006.01);
U.S. Cl.
CPC ...
G06F 1/04 (2013.01); G06F 1/08 (2013.01); G06F 11/34 (2013.01); G06F 9/4881 (2013.01);
Abstract

Techniques described herein generally relate to multi-core processors including two or more processor cores. Example embodiments may set forth devices, methods, and computer programs related to calculating a clock rate for one or more of the processor cores in the multi-core processor. One example method may include determining a first estimated workload for a first processor core and a second estimated workload for a second processor core within a scheduling interval in a periodic scheduling environment. In addition, a first clock rate for the first processor core may be calculated based on one or more of the first estimated workload, a maximum clock rate supported by the multi-core processor and/or the scheduling interval. Similarly, a second clock rate for the second processor core may also be calculated based on one or more of the second estimated workload, the maximum clock rate, and/or the scheduling interval.


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